The present invention relates to active semiconductor devices and their fabrication, and more particularly to a structure and method of fabricating a field effect transistor.
It is highly desirable for field effect transistors having deep sub-micron dimensions (those having conduction channels of width less than about 50 nm) to have very sharp and small junction depth. Conventional methods of annealing by which an implanted substrate is heated to drive the diffusion of dopants do not produce sufficiently abrupt and small junction depth because the dopants move too far under such heating. Methods of laser annealing, by contrast, can produce sufficiently small junction depth. However, when the substrate is not heated long enough, dislocations in the crystal structure of the semiconductor remain at the boundary between an implanted region of the crystalline semiconductor and unimplanted regions. These dislocations lead to problems, such as unacceptably high leakage current and/or high external resistance. The FET structures and methods described herein are suited to address such problems.